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| TUESDAY, June 8, 2004, 2:00 PM - 4:00 PM | Room: 6A |
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TOPIC AREA: POWER
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SESSION 6
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| Special Session: Reliable System-on-a-Chip Design in the Nanometer Era
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| Chair: Chandu Visweswariah - IBM, Corp, Yorktown Heights, NY
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| Organizers: Naresh Shanbhag, Giovanni De Micheli
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| Reliability of systems-on-chips (SOCs) is recognized to be the major problem of this decade. In addition to performance and power dissipation, SOCs also have to satisfy constraints on mean time to failure. The dramatic increase in complexity further compounds the problem. This special session will focus on the reliability problem in SOCs at the semiconductor process technology, algorithms, computation, communication, systems and software levels. These presentations will be coordinated to provide a comprehensive view of this important problem.
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| 6.1 |
Design and Reliability Challenges in Nanometer Technologies
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| Speaker(s): | Shekhar Borkar - Intel Corp., Hillsboro, OR
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| Author(s): | Shekhar Borkar - Intel Corp., Hillsboro, OR
Tanay Karnik - Intel Corp., Hillsboro, OR
Vivek De - Intel Corp., Hillsboro, OR
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| 6.2s | A Communication-Theoretic Design Paradigm for Reliable SoCs |
| Speaker(s): | Naresh Shanbhag - Univ. of Illinois, Urbana-Champaign, Urbana, IL
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| Author(s): | Naresh Shanbhag - Univ. of Illinois, Urbana, IL
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| 6.3s | Reliable Communication in SoCs |
| Speaker(s): | Giovanni De Micheli - Stanford Univ., Stanford, CA
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| Author(s): | Giovanni De Micheli - Stanford Univ., Stanford, CA
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| 6.4s | Designing Robust Microarchitectures |
| Speaker(s): | Todd Austin - Univ. of Michigan, Ann Arbor, MI
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| Author(s): | Todd Austin - Univ. of Michigan, Ann Arbor, MI
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| 6.5s | Hierarchical Application-Aware Error Detection and Recovery |
| Speaker(s): | Ravishankar K. Iyer - Univ. of Illinois, Urbana, IL
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| Author(s): | Ravishankar K. Iyer - Univ. of Illinois, Urbana, IL
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| 6.6 | Panel Discussion |
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