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TUESDAY, June 8, 2004, 2:00 PM - 4:00 PM | Room: 6A
TOPIC AREA:  POWER

   SESSION 6
  Special Session: Reliable System-on-a-Chip Design in the Nanometer Era
  Chair: Chandu Visweswariah - IBM, Corp, Yorktown Heights, NY
  Organizers: Naresh Shanbhag, Giovanni De Micheli

  Reliability of systems-on-chips (SOCs) is recognized to be the major problem of this decade. In addition to performance and power dissipation, SOCs also have to satisfy constraints on mean time to failure. The dramatic increase in complexity further compounds the problem. This special session will focus on the reliability problem in SOCs at the semiconductor process technology, algorithms, computation, communication, systems and software levels. These presentations will be coordinated to provide a comprehensive view of this important problem.

    6.1   Design and Reliability Challenges in Nanometer Technologies
  Speaker(s): Shekhar Borkar - Intel Corp., Hillsboro, OR
  Author(s): Shekhar Borkar - Intel Corp., Hillsboro, OR
Tanay Karnik - Intel Corp., Hillsboro, OR
Vivek De - Intel Corp., Hillsboro, OR
    6.2sA Communication-Theoretic Design Paradigm for Reliable SoCs
  Speaker(s): Naresh Shanbhag - Univ. of Illinois, Urbana-Champaign, Urbana, IL
  Author(s): Naresh Shanbhag - Univ. of Illinois, Urbana, IL
    6.3sReliable Communication in SoCs
  Speaker(s): Giovanni De Micheli - Stanford Univ., Stanford, CA
  Author(s): Giovanni De Micheli - Stanford Univ., Stanford, CA
    6.4sDesigning Robust Microarchitectures
  Speaker(s): Todd Austin - Univ. of Michigan, Ann Arbor, MI
  Author(s): Todd Austin - Univ. of Michigan, Ann Arbor, MI
    6.5sHierarchical Application-Aware Error Detection and Recovery
  Speaker(s): Ravishankar K. Iyer - Univ. of Illinois, Urbana, IL
  Author(s): Ravishankar K. Iyer - Univ. of Illinois, Urbana, IL
    6.6Panel Discussion